The growing demand for wireless communications has led to designs for radios and other communication equipment that permit the integration of more components onto a single chip. Advances in CMOS semiconductor processing now allow the integration of radio receiver and transmitter onto a single-chip RF transceiver that reduces cost, size, and power consumption. This very high level of integration and the ability to fit a high density of transistors on silicon have enabled new solutions for existing problems.
PLLs using VCOs form the core components for most communication system hardware implementations. Applications with PLLs include radio-frequency (RF) receivers and transmitters for all communication standards, optical fiber communications, network communications, and storage systems applications.
In normal operations, the PLL is expected to step within a specified time from one locked frequency to another, e.g. stepping from a receive channel to a transmit channel in a transceiver. The specified time allowed for this transition in frequency is determined by the specifications of the communication system. During such a transition, the PLL must lock and settle to the new frequency and, equally importantly, the PLL must operate optimally at the new frequency within the specified time. Auto-calibrating the VCO allows the PLL to achieve the frequency transition within the specified time period in spite of the variations introduced during the manufacturing process.
PLLs are generally built with a phase detector, charge pump, filter, VCO, a digital control logic block, D, for programming the VCO, and a divider (÷N) such that the frequency of the output signal of the VCO, Fout, is locked to a multiple (N) of a reference frequency Fref. FIG. 1 shows an example of a PLL using a VCO with coarse and fine tuning and FIG. 2 shows a VCO that can be used in a PLL. The coarse tuning is conducted using a switchable capacitor array (8b) that switches in the correct value of capacitance. The fine tuning then uses an analog control voltage signal, Vfine-tune, to set the capacitance of a voltage-dependent-capacitor or varactor, to “capture” the desired frequency. This combination of coarse and fine tuning allows the PLL designer to have a low voltage-to-frequency conversion gain in the VCO (Kvco), thereby improving a PLL's performance. In order to minimize Kvco, the value of the varactor is minimized and the values of the coarse tuning capacitors are maximized. Thus, it is essential to switch to the correct value of the coarse tuning capacitor each time a frequency step is requested.
Previously, one method for the fast tuning of a VCO involves the use of a coarse tuning varactor and a fine tuning varactor. The coarse tuning varactor is set based on the output of digital counter and a DAC (digital to analog converter). U.S. Pat. No. 6,566,966. This process is repeated each time the VCO steps from one frequency to another leading to a slow tuning response.
Another method involves the creation of a look-up table by turning on and off all the possible combinations of the coarse tuning switches and recording and storing the VCO output frequencies for a fixed setting of the fine tuning analog control voltage. U.S. Pat. No. 6,512,419. During normal operation, this table is used to obtain the correct digital code to coarse tune to the desired frequency. The calibration time for this approach is long and a large storage memory is required to store this information.
Another method involves choosing a set of switched varactors during calibration and using the fine tuning varactor to switch from one tuning frequency to another. U.S. Pat. No. 6,933,789. This method has a major drawback in that it cannot ensure a low Kvco. In the application of the method described in this patent, the frequency band of operation determines how small the fine tuning varactor can be and hence how low the Kvco can be. Therefore, previously known methods are not suitable for use in applications requiring high speed PLL frequency transition times.
Due to the limitations of the prior art, it is therefore desirable to have novel methods that provide high speed VCO calibration and fast tuning during frequency transitions.